Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 7/08/2024
Public
Document Table of Contents

EDA_TEST_BENCH_GATE_LEVEL_NETLIST_LIBRARY

Specify the simulation library to which Gate Level Netlist will be compiled

Type

String

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Notes

The value of this assignment is case sensitive.

Syntax

set_global_assignment -name EDA_TEST_BENCH_GATE_LEVEL_NETLIST_LIBRARY -section_id <section identifier> <value>