Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 7/08/2024
Public
Document Table of Contents

EMIF_SOC_PHYCLK_ADVANCE_MODELING

Instructs routing annotation to adjust the AV-SoC Phyclk delays.

Type

Boolean

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Syntax

set_global_assignment -name EMIF_SOC_PHYCLK_ADVANCE_MODELING <value>

Default Value

Off