Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 7/08/2024
Public
Document Table of Contents

EDA_RTL_SIM_MODE

Enables the Advanced Options - VHDL or Verilog Simulation options for Test Bench mode or Command/macro mode.

Type

Enumeration

Values

  • COMMAND_MACRO_MODE
  • NOT_USED
  • TEST_BENCH_MODE

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Syntax

set_global_assignment -name EDA_RTL_SIM_MODE -section_id <section identifier> <value>
set_global_assignment -name EDA_RTL_SIM_MODE -entity <entity name> -section_id <section identifier> <value>

Default Value

TEST_BENCH_MODE, requires section identifier