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6.1. Synthesis Tool
6.2. Device Resource Reports
6.3. Quartus® Prime Message
6.4. Design Assistant Design Rule Checking
6.5. Timing Constraints and Analysis
6.6. Area and Timing Optimization
6.7. Preserving Performance and Reducing Compilation Time
6.8. Designing with Hyperflex®
6.9. Simulation
6.10. Power Analysis
6.11. Design Implementation, Analysis, Optimization and Verification Revision History
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5.3.1. Board-Related Quartus® Prime Settings
Number |
Done? |
Checklist Item |
---|---|---|
1 |
Set the settings for the FPGA I/O pins correctly and plan for the functionality during board design. |
The Quartus® Prime software provides options for the FPGA I/O pins to consider during board design. Ensure that these options are set correctly when the Quartus® Prime project is created, and plan for the functionality during board design.