Visible to Intel only — GUID: rek1676683829120
Ixiasoft
Visible to Intel only — GUID: rek1676683829120
Ixiasoft
6. Design Example: Two Separate Instances of Auto-Negotiation and Link Training and Ethernet IP Design
When you enable auto-negotiation and link training parameter in the IP and select the design Two separate instances of AN/LT, ETH IP and generate a design example, which instantiates two separate instances of IPs, F-Tile Ethernet Intel FPGA Hard IP and the F-Tile Auto-Negotiation and Link Training for Ethernet. You must connect required signals at the top level of your testbench.
Selected IP Parameter Settings | Value |
---|---|
General Options | |
PMA type | FGT |
Ethernet mode | 100GE-4 |
Client interface | MAC segmented |
FEC mode | IEEE 802.3 RS(528,514) (CL91) |
PMA reference frequency | 156.25 MHz |
System PLL frequency | 805.6640625 MHz |
Example Design Tab: Available Example Designs | |
Select Design | Two separate instances of AN/LT, ETH IP |
Selected IP Parameter Settings | Value |
---|---|
Mode Selection | |
Enable auto-negotiation on reset | On |
Enable link training on reset | On |
PMA type | FGT |
Ethernet mode | 100GE-4 |
KR or CR mode | KR mode |
Number of ports | 1 |
FEC mode | IEEE 802.3 RS(528,514) |
Status clock frequency | 100 MHz |
For more information about steps of how to generate a design example, refer to the Generating Single IP Instance Design in Generating the Design Example.Generating the Design Example.