Visible to Intel only — GUID: iga1447715914095
Ixiasoft
Visible to Intel only — GUID: iga1447715914095
Ixiasoft
3.5.5.7.3. Sequential Access
SDRAM performance benefits from sequential accesses. When access is sequential, data is written or read from consecutive addresses and it may be possible to increase throughput by using bursting. In addition, the SDRAM controller can optimize the accesses to reduce row and bank switching. Each row or bank change incurs a delay, so that reducing switching increases throughput.