Agilex™ 5 FPGA E-Series 065B Premium Development Kit User Guide

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ID 814550
Date 8/05/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Premium Development Kit User Guide A. Development Kit Components B. Additional Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Quartus® Prime Software and Driver Installation 2.2. Quick Start Guide 2.3. Design Examples
3. Development Kit Setup x
3.1. Installing the HPS Expansion Board (HPS-EB) 3.2. Default Settings 3.3. Powering Up the Development Kit 3.4. Performing Board Restore
3.4. Performing Board Restore x
3.4.1. Restoring Board QSPI Flash U10 with Default Factory Image 3.4.2. Restoring Board QSPI Flash U4 with Default Factory Image 3.4.3. Restoring SD Card with the Default Factory Image
4. Board Test System x
4.1. Setting Up BTS GUI Running Environment 4.2. Troubleshooting for Launching BTS 4.3. BTS Functionalities
4.1. Setting Up BTS GUI Running Environment x
4.1.1. Installing Quartus® Prime Software 4.1.2. Setting Up the Programmer 4.1.3. Running the BTS GUI on Windows 4.1.4. Running the BTS GUI on Linux
4.1.4. Running the BTS GUI on Linux x
4.1.4.1. Configuring the Linux UART Environment 4.1.4.2. Launching the BTS
4.3. BTS Functionalities x
4.3.1. Diagnostic GUI 4.3.2. Clock Controller GUI 4.3.3. Power Monitor GUI 4.3.4. MAX® 10 Controller GUI 4.3.5. Agilex™ 5 FPGA Functionality 4.3.6. Information Display 4.3.7. Migrating Development Kit Installer Package from v24.1 to v24.2
4.3.2. Clock Controller GUI x
4.3.2.1. Si5332 Clock 4.3.2.2. Si5518 Clock
4.3.3. Power Monitor GUI x
4.3.3.1. Power Monitor 4.3.3.2. Temperature Monitor
4.3.4. MAX® 10 Controller GUI x
4.3.4.1. Remote I/O Control 4.3.4.2. Expansion Board Control 4.3.4.3. System Control
4.3.4.1. Remote I/O Control x
4.3.4.1.1. Remote Control 4.3.4.1.2. MISC LED Control
4.3.4.1.1. Remote Control x
4.3.4.1.1.1. Push Button 4.3.4.1.1.2. User Switch 4.3.4.1.1.3. MSEL 4.3.4.1.1.4. Si569-1V8
4.3.5. Agilex™ 5 FPGA Functionality x
4.3.5.1. The GPIO Tab 4.3.5.2. The Memory Tab 4.3.5.3. The Transceiver Tab
4.3.5.2. The Memory Tab x
4.3.5.2.1. The DDR4 COMP Tab 4.3.5.2.2. The HPS DDR4 COMP Tab 4.3.5.2.3. The LPDDR4 COMP Tab
4.3.5.3. The Transceiver Tab x
4.3.5.3.1. QSFP Test 4.3.5.3.2. SFP+ Test 4.3.5.3.3. FMC+ Test 4.3.5.3.4. SMA Test
4.3.6. Information Display x
4.3.6.1. Sys Info 4.3.6.2. Connection 4.3.6.3. The Bottom Status Bar
5. Development Kit Hardware and Configuration x
5.1. Configuring the FPGA and Accessing HPS Debug Access Port by JTAG 5.2. Configuring the FPGA Device by Active Serial (AS) Modes (Default Mode) 5.3. Configuring the FPGA Device by Avalon® Streaming Modes 5.4. Expansion Boards
5.4. Expansion Boards x
5.4.1. HPS Expansion Board (HPS-EB) 5.4.2. HPS NAND Board (HPS-NB) 5.4.3. HPS Test Board (HPS-TB)
5.4.1. HPS Expansion Board (HPS-EB) x
5.4.1.1. Booting from SD Card using HPS Enablement DC
6. Custom Projects for the Development Kit x
6.1. Golden Top 6.2. EMIF Pin Swizzling Setting
A. Development Kit Components x
A.1. Board Overview A.2. System Management A.3. Power A.4. Clocks A.5. General Input/Output A.6. Input and Output Components A.7. Memory Interfaces A.8. Communication Interfaces A.9. Expansion Boards A.10. Connectors and Headers
A.2. System Management x
A.2.1. JTAG Master Sources
A.6. Input and Output Components x
A.6.1. Push Buttons A.6.2. Switches A.6.3. LEDs
A.8. Communication Interfaces x
A.8.1. QSFP+ A.8.2. SFP+ A.8.3. Ethernet A.8.4. FMC A.8.5. MIPI A.8.6. USB3.1 A.8.7. HPS IO48 Interface A.8.8. Serial Buses
A.9. Expansion Boards x
A.9.1. HPS Expansion Board (HPS-EB) A.9.2. HPS NAND Board (HPS-NB) A.9.3. HPS Test Board (HPS-TB)
B. Additional Information x
B.1. Safety and Regulatory Information B.2. Compliance Information
B.1. Safety and Regulatory Information x
B.1.1. Safety Warnings B.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Premium Development Kit User Guide
A. Development Kit Components
B. Additional Information

A.10. Connectors and Headers

Table 30.  Connectors and Headers
Board Reference Description Part Number
J2 JTAG Header 10-pins 70247-1051 (Molex*)
J33 RS232 Debug header 3-pins HTSW-103-07-L-S (Samtec*)
J36 HSIO bank IO header 10-pins TSM-105-01-T-DV-TR (Samtec)
J9 HVIO bank IO header 10-pins TSM-105-01-T-DV-TR (Samtec)
J10 MIPI connector 22-pins 52437-2271 (Molex)
J11 HPS card connector ADM6-30-01.5-S-4-2-A-TR (Samtec)
J12 QSFP1 connector FS1-K38-20ZA-A0 (Amphenol*)
J13 QSFP2 connector FS1-K38-20ZA-A0 (Amphenol)
J14 SFP1 connector UE76-3GA20-3600T (Amphenol)
J15 SFP2 connector UE76-3GA20-3600T (Amphenol)
J34 FMC+ connector ASP-184329-01 (Samtec)
J41 RJ45 connector for SGMII 0826-1X1T-KH-F (Bel Fuse*)
J42 RJ45 connector for RGMII L829-1J1T-43 (Bel Fuse)
J27 Micro USB connector 47589-0001 (Molex)
J93 SYS_CLOCK_I2C_SCL/SDA header 3-pins TSM-103-01-L-SV-P-TR (Samtec)
J45 FPGA_3V3_SVID_SCL/SDA header 4-pins DF3-4P-2DSA (Hirose Electric*)
J46 MAX_I2C_SCL/SDA header 4-pins DF3-4P-2DSA (Hirose Electric)
J6 HSIO bank SMA connector for 1PPS_OUT1 (or LVDS_SMA_TXN) LTI-SASF546-P26-X1 (Lighthorse Technology*)
J8 HSIO bank SMA connector for 1PPS_OUT2 (or LVDS_SMA_TXP) LTI-SASF546-P26-X1 (Lighthorse Technology)
J43 HSIO bank SMA connector for 1PPS_IN1 (or LVDS_SMA_RXN) LTI-SASF546-P26-X1 (Lighthorse Technology)
J44 HSIO bank SMA connector for 1PPS_IN2 (or LVDS_SMA_RXP) LTI-SASF546-P26-X1 (Lighthorse Technology)
J16/J15 XCVR bank SMA connector for TX1_P/N LTI-SASF546-P26-X1 (Lighthorse Technology)
J17/J19 XCVR bank SMA connector for TX2_P/N LTI-SASF546-P26-X1 (Lighthorse Technology)
J20/J22 XCVR bank SMA connector for RX1_P/N LTI-SASF546-P26-X1 (Lighthorse Technology)
J21/J23 XCVR bank SMA connector for RX2_P/N LTI-SASF546-P26-X1 (Lighthorse Technology)
J24/J25 XCVR bank SMA connector for REFCLK_P/N LTI-SASF546-P26-X1 (Lighthorse Technology)
J28 SMA connector for 10MHz_SMA_IN to SI5518A clock input LTI-SASF546-P26-X1 (Lighthorse Technology)
J29 SMA connector for 1PPS_SMA_IN to SI5518A clock input LTI-SASF546-P26-X1 (Lighthorse Technology)
J30/J31 SMA connector for SI5332A CLKOUT_P/N LTI-SASF546-P26-X1 (Lighthorse Technology)
J32 Power input header 2x4 455860005 (Molex)
Level Two Title