Low Latency 40G Ethernet Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813652
Date 7/22/2024
Public
Document Table of Contents

4.3.2. Padding Bytes Insertion

When the length of the client frame is less than 64 bytes, the TX MAC module inserts pad bytes (0x00) after the payload to create a frame length equal to the minimum size of 64 bytes (including CRC).
Note: The IP does not support the length of client frame less than 9 bytes and filters it out if MAC TX receives such a short frame. That is, if l2_tx_starofpacket and l2_tx_endofpacket are asserted at the same cycle, these are filtered out regardless of preamble pass-through mode.