Low Latency 40G Ethernet Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813652
Date 7/22/2024
Public
Document Table of Contents

4.2. GTS Transceiver Configuration

The GTS transceiver in the IP is configured in PCS Direct (PCS66) mode. For more details, refer to GTS Transceiver PHY User Guide .

The GTS transceivers are equipped with the following clock networks:
  • Reference clock
  • Core interface clock

The reference clock to the PMA is configured at 156.25 MHz.