Visible to Intel only — GUID: cez1639577283482
Ixiasoft
Visible to Intel only — GUID: cez1639577283482
Ixiasoft
4.2. Interfaces
Interfaces | Description |
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Avalon® streaming interface | The client-side interface of the MAC employs the Avalon® streaming protocol, which is a synchronous point-to-point, unidirectional interface that connects the producer of a data stream (source) to a consumer of the data (sink). The key properties of this interface include:
In the MAC IP core, the Avalon® streaming interface acts as a sink in the TX datapath and source in the RX datapath. This interface supports packets, backpressure, and error detection. It operates at either 312.5 MHz or 156.25 MHz depending on the operating mode. The ready latency on this interface is 0. |
Avalon® memory-mapped Control and Status Register Interface | The Avalon® memory-mapped control and status register interface is an Avalon® memory-mapped slave port. This interface uses word addressing which provides access to the configuration and status registers, and statistics counters. |
XGMII | For 10M/100M/1G/2.5G/5G/10G (USXGMII) speed mode, the network-side interface of the MAC IP core implements the XGMII protocol. The XGMII consists of 32-bit data bus and 4-bit control bus operating at 312.5 MHz with TX/RX XGMII valid signal to reflect the data rate accordingly for the multiple Ethernet speed lower than 10G. The data bus carries the MAC frame with the most significant byte occupying the least significant lane. |