Visible to Intel only — GUID: hqo1631599750668
Ixiasoft
Visible to Intel only — GUID: hqo1631599750668
Ixiasoft
2.3.4. Mitigated FIT
The Projected SEU FIT by Component Usage report's w/ECC column represents the FPGA's lowest guaranteed, provable FIT rate that the Quartus® Prime software can calculate. ECC does not affect CRAM and flipflop rates; therefore, the data in the w/ECC column for these components is the same as the in Utilized column.
The ECC code strength varies with the device family. In Arria® 10 devices, the M20K block can correct up to two errors, and the FIT rate beyond two (not corrected) is small enough to be negligible in the total.