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Ixiasoft
1. Overview
2. Quartus® Prime Software SEU FIT Reports
3. Arria® 10 Error Detection and Correction Feature Architecture
4. Guidelines for Error Detection CRC and Error Correction Feature
5. Guidelines for Embedded Memory ECC Feature
6. Arria® 10 EDCRC Reference Design
7. Implementing ECC Feature in Arria® 10 ROM Design
8. Modifying Single-Device .jam Files for Use in a Multi-Device JTAG Chain
9. Document Revision History for AN 737: SEU Detection and Recovery in Arria® 10 Devices
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Ixiasoft
6.2.4.1. Generating In-System Source and Probe IP Core
To generate ISSP, perform the following steps:
- On IP Catalog, expand Basic Functions, expand Simulation; Debug and Verification, expand Debug and Performance and double click Altera In-System Sources and Probes.
- IP Parameter Editor appears, key in issp in Entity name, click OK.
- Set Probe Port Width [0..511] to 0.
- Set Source Port Width [0..511] to 4.
- Leave default to all other setting.
- Click Generate HDL from Generate Menu, click Generate.
- Click close and click Exit from File menu.
- Click Yes if prompted to add the Quartus® Prime IP File to the project.