Power Management User Guide: Agilex™ 5 FPGAs and SoCs

ID 813161
Date 7/08/2024
Public
Document Table of Contents

5. Agilex™ 5 Power Optimization Techniques and Features

Agilex™ 5 devices leverage an advanced 10-nm process technology, an enhanced core architecture, and various optimizations to reduce total power consumption. The power optimization techniques and features are listed below:
  • SmartVID on Standard Power Devices
    • Temperature Compensation
  • Digital signal processing (DSP) and M20K Power Gating
  • Clock Gating
  • Power Sense Line