Power Management User Guide: Agilex™ 5 FPGAs and SoCs

ID 813161
Date 7/08/2024
Public
Document Table of Contents

2.1. Power Consumption

The total power consumption of an Agilex™ 5 device consists of the following components:
  • Static power—the power that the configured device consumes when powered up but no user clocks are operating, excluding DC bias power of analog blocks, such as I/O and transceiver analog circuitry.
  • Dynamic power—the additional power consumption of the device due to signal activity or toggling. Dynamic power is dependent on the operating frequency of your design, applied voltage, and load capacitance, which depends on design connectivity.

Agilex™ 5 devices minimize static and dynamic power using advanced process optimizations. These optimizations allow Agilex™ 5 designs to meet specific performance requirements with the lowest possible power.