External Memory Interfaces Agilex™ 7 M-Series FPGA IP User Guide

ID 772538
Date 7/08/2024
Public
Document Table of Contents

4.3.3. usr_async_clk for External Memory Interfaces (EMIF) IP

User clock interface

Table 49.  Interface: usr_async_clkInterface type: clock
Port Name Direction Description
usr_async_clk input User clock