External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP User Guide

ID 772538
Date 12/04/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.1.6. Intel Agilex® 7 M-Series EMIF Architecture: PHY Clock Tree

Dedicated high-speed clock networks drive I/Os in the Intel Agilex® 7 M-Series EMIF.

The relatively short span of the PHY clock trees results in low jitter and low duty-cycle distortion, maximizing the data valid window.

The PHY clock tree in Intel Agilex® 7 M-Series devices can run as fast as 1.6 GHz. All Intel Agilex® 7 M-Series external memory interfaces use the PHY clock trees.