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Ixiasoft
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Ixiasoft
4.1.2.3. Termination Schemes
These signals include data (DQ), data strobe (DQS), data mask (DM), clocks (CK, and CK#), command address (CA), and control (CS#, and CKE).
Signal Type |
HSUL-12 Standard (1) (2) |
Memory End Termination |
---|---|---|
DQS/DQS# |
R34 CAL |
ZQ40 |
Data (Write) |
R34 CAL |
– |
Data (Read) |
– |
ZQ40 |
Data Mask (DM) |
R34 CAL |
– |
CK/CK# Clocks |
R34 CAL |
×1 = – (4) ×2 = 200 -ohmDifferential (5) |
Command Address (CA), |
R34 CAL |
– |
Chip Select (CS#) |
R34 CAL |
– |
Clock Enable (CKE) (3) |
R34 CAL |
4.7 K-ohmparallel to GND |
Notes to Table:
|
- Class I termination (50 ohms parallel to VTT at the memory end) — Unidirectional signal (Command Address, control, and CK/CK# signals)
- Class II termination (50 ohms parallel to VTT at both ends) — Bidirectional signal ( DQ and DQS/DQS# signal)
Intel recommends that you simulate your design to ensure good signal integrity.