Visible to Intel only — GUID: hco1416492173569
Ixiasoft
Visible to Intel only — GUID: hco1416492173569
Ixiasoft
13. Power Estimation Methods for External Memory Interfaces
Method |
Vector Source |
UniPHY Support |
Accuracy |
Estimation Time (1) |
---|---|---|---|---|
Early power estimator (EPE) |
Not applicable |
v |
Lowest Highest |
Fastest Slowest |
Vector-less power analysis (PPPA) |
Not applicable |
v |
||
Vector-based power analysis |
RTL simulation |
v |
||
Zero-delay simulation (2) |
v |
|||
Timing simulation |
(2) |
|||
Notes to Table:
|
When using Intel® FPGA IP, you can use the zero-delay simulation method to analyze the power required for the external memory interface. Zero-delay simulation is as accurate as timing simulation for 95% designs (designs with no glitching). For a design with glitching, power may be under estimated.
For more information about zero-delay simulation, refer to the Power Estimation and Analysis section in the Quartus ® Prime Handbook.
Section Content
Performing Vector-Based Power Analysis with the Power Analyzer
Document Revision History