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Ixiasoft
Visible to Intel only — GUID: hco1416490995979
Ixiasoft
2.2.1.1. External Parallel Termination
The following two figures illustrate the most common termination topologies: fly-by topology and non‑fly-by topology, respectively.
With fly‑by topology, you place the parallel termination resistor after the receiver. This termination placement resolves the undesirable unterminated stub found in the non‑fly-by topology. However, using this topology can be costly and complicate routing.
With non‑fly‑by topology, the parallel termination resistor is placed between the driver and receiver (closest to the receiver). This termination placement is easier for board layout, but results in a short stub, which causes an unterminated transmission line between the terminating resistor and the receiver. The unterminated transmission line results in ringing and reflection at the receiver.
If you do not use external termination, DDR2 offers ODT and Intel® FPGAs have varying levels of OCT support. You should explore using ODT and OCT to decrease the board power consumption and reduce the required board space.