Visible to Intel only — GUID: hco1416491426128
Ixiasoft
Visible to Intel only — GUID: hco1416491426128
Ixiasoft
7.2.3.2.3. Memory Initialization Options for LPDDR2
Memory Initialization Options—LPDDR2 |
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Mode Register 1 |
Burst Length |
Specifies the burst length. |
Read Burst Type |
Specifies accesses within a given burst in sequential or interleaved order. Specify sequential ordering for use with the Intel memory controller. Specify interleaved ordering only for use with an interleaved-capable custom controller, when the Generate PHY only parameter is enabled on the PHY Settings tab. |
|
Mode Register 2 |
Memory CAS latency setting |
Determines the number of clock cycles between the READ command and the availability of the first bit of output data at the memory device. Set this parameter according to the target memory interface frequency. Refer to memory data sheet and also target memory speed grade. |
Mode Register 3 |
Output drive strength settings |
Determines the output driver impedance setting at the memory device. To obtain the optimum signal integrity performance, select the optimum setting based on the board simulation results. |