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Ixiasoft
7.2.3.4. Memory Parameters for RLDRAM II Controller with UniPHY Intel FPGA IP
Use the Memory Parameters tab to apply the memory parameters from your memory manufacturer’s data sheet.
Parameter |
Description |
---|---|
Address width |
The width of the address bus on the memory device. |
Data width |
The width of the data bus on the memory device. |
Bank-address width |
The width of the bank-address bus on the memory device. |
Data-mask width |
The width of the data-mask on the memory device, |
QK width |
The width of the QK (read strobe) bus on the memory device. Select 1 when data width is set to 9. Select 2 when data width is set to 18 or 36. |
DK width |
The width of the DK (write strobe) bus on the memory device. Select 1 when data width is set to 9 or 18. Select 2 when data width is set to 36. |
Burst length |
The burst length supported by the memory device. For more information, refer to memory vendor data sheet. |
Memory mode register configuration |
Configuration bits that set the memory mode. Select the option according to the interface frequency. |
Device impedance |
Select External (ZQ) to adjust the driver impedance using the external impedance resistor (RQ). The output impedance range is 25-60. You must connect the RQ resistor between ZQ pin and ground. The value of RQ must be 5 times the output impedance. For example, 60 output impedance requires 300 RQ. Set the value according to the board simulation. |
On-Die Termination |
Turn on this option to enable ODT in the memory to terminate the DQs and DM pins to Vtt. Dynamically switch off during read operation and switch on during write operation. Refer to memory vendor data sheet for more information. |
Topology |
|
Device width |
Specifies the number of memory devices used for width expansion. |