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Ixiasoft
9.11.2.2. Slew Rate Setup, Hold, and Derating Calculation
For more information about slew rate calculation, setup, hold, and derating values, download the data sheet specifications from the following websites:
- Micron (https://www.micron.com) For example, refer to Command and Address Setup, Hold, and Derating section in the Micron DDR3 data sheet.
- JEDEC (https://www.jedec.org) For example, refer to the DDR2 SDRAM Standard data sheet.
The following content describes the timing derating algorithms and shows you where to obtain the setup, hold, and derating values in the Micron data sheet.
The slew rate derating process uses the following timing derating algorithms, which are similar to the JEDEC specification:
- tDS = tDS(base) + deltatDS + (VIHAC -VREF)/(DQ slew rate)
- tDH = tDH(base) + delta tDH + (VIHDC -VREF)/(DQ slew rate)
- tIS =tIS (base) + delta tIS + (VIHAC -VREF)/(Address/Command slew rate)
- tIH= tIH(base) + delta tIH + (VIHDC -VREF)/(Address/Command slew rate)
where:
- The setup and hold values for tDS(base), tDH(base), tIS(base), and tIH(base) are obtained from the Micron data sheet. The following figure shows an example:
Figure 76. Setup and Hold Values from Micron Data sheet
- The JEDEC-defined logic trip points for the DDR3 SDRAM memory standard are as follows:
- VIHAC = VREF + 0.175 V
- VIHDC = VREF + 0.1 V
- VILAC = VREF - 0.175 V
- VILDC = VREF - 0.1 V
-
Obtain the derating values for delta tIS, tIH, tDH, and tDS from the Micron data sheet. The following figure shows an image of the derating values from the data sheet.
Figure 77. Derating Values from Micron Data sheet