Visible to Intel only — GUID: joc1409453058816
Ixiasoft
Visible to Intel only — GUID: joc1409453058816
Ixiasoft
1.2.1.2. FEFFECTIVE
As previously described, a capacitor reduces PDN impedance by providing a least-impedance route between power and ground for transient current. Impedance of a capacitor at high frequency is determined by its parasitics (ESL and ESR). For a PCB with capacitors mounted, the parasitics include not only the parasitic from the capacitors themselves but also those associated with mounting, PCB spreading, and packaging. Therefore, PCB capacitor parasitics are generally higher than on-die capacitor parasitics. As a result, decoupling using PCB capacitors becomes ineffective at higher frequencies. Using PCB capacitors for PDN decoupling beyond their effective frequency range brings no improvement to PDN performance and raises the bill of materials (BOM) cost.
To help reduce over-design of PCB decoupling, this release of the PDN tool provides a suggested PCB decoupling design cut-off frequency (FEFFECTIVE) as another guideline. You only need to design PCB decoupling that keeps ZEFF under ZTARGET up to FEFFECTIVE. ZEFF is the impedance profile of the PCB design and includes all PDN-related design parasitics, including:
- VRM R and L
- PCB spreading R and L
- Plane R and C
- Decoupling capacitors
- BGA_via R and L
FEFFECTIVE defines the effective frequency of on-board decoupling capacitors.
Refer to Troubleshooting ZEFF if the ZEFF is too high or the number of capacitors for decoupling becomes too high.