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1.2.2.1.1. Device Selection Section
1.2.2.1.2. Power Rail Data and Configuration Section
1.2.2.1.3. Meeting Target Impedance when Entering 0 A into the PDN Tool
1.2.2.1.4. Dealing with Multiple Shared Power Supply Pin Types
1.2.2.1.5. VRM Data Section
1.2.2.1.6. Rail Group Summary Section
1.2.2.1.7. VRM Impedance Section
1.2.2.1.8. BGA Via Section
1.2.2.1.9. Plane Section
1.2.2.1.10. Spreading Section
1.2.2.1.11. Implementing Split Planes
1.2.2.1.12. FEFFECTIVE Section
1.2.2.1.13. Decoupling Section
1.2.2.1.14. Results Summary Section
1.2.2.1.15. Recommended Flow for Deriving Decoupling for an FPGA System using the System_Decap Tab
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1.2.2.3. BGA_Via
The BGA Via tab calculates the vertical via loop inductance under the BGA pin field.
Figure 15. BGA_Via TabThe values in the Unit column indicate a unit value per one pair.
Enter the layout-specific information such as via drill diameters, via length, via pitch, and the number of power/ground via pairs under the BGA in the BGA Via Inductance table. The tool calculates the effective via loop inductance and resistance value. You can save the change made to the tab, restore the changes, or restore the tab back to the default settings.