Visible to Intel only — GUID: lby1678418233876
Ixiasoft
Visible to Intel only — GUID: lby1678418233876
Ixiasoft
14.6.2. Memory Data Initialization
When an ECC controller is enabled, the memory data must be written first before any data read occurs. If the memory is not written, the ECC syndrome bits are random, potentially causing false single- or double-bit errors when the memory data is read.
ECC protects every byte of data in the RAM. This protection can lead to spurious ECC errors under the following conditions:
- When the MPU pre-fetches any uninitialized locations.
- When the MPU (or any master) reads from an uninitialized byte.
To prevent spurious ECC errors, software must use the memory initialization block in the ECC controller to initialize the entire memory data and ECC bits. The initialization block clears the memory data. Enabling initialization in the ECC Control (CTRL) register is independent of enabling the ECC.
The initialization block is accessed through the register target interface. The Cortex* -A76 and -A55 MPCore™ and secure device manager (SDM) can directly access the register slave interface and initialize the memory.
When a tamper event occurs, the SDM uses the initialization block to scramble all of the ECC memories. The SDM can initiate this memory scrambling as part of a secure boot, secure configuration or authentication and at any time during functional or non-functional mode.