Visible to Intel only — GUID: qws1676414111196
Ixiasoft
Visible to Intel only — GUID: qws1676414111196
Ixiasoft
11.8.3.5. FPGA-to-HPS Example Transactions Summary
The following table shows a summary of the F2H example transactions.
Attribute | F2SDRAM Direct (Cache Non-Allocate) | F2H to SDRAM/ OCRAM (Cache Non-Allocate) | F2H to SDRAM/ OCRAM (Cache Allocate) | F2H to Peripherals (Device Non-Bufferable) | Note |
---|---|---|---|---|---|
ARDOMAIN[1:0] | ‘b00 | ‘b01 | ‘b01 | ‘b01 | ‘b00 = Non-shareable ‘b01 = Inner sharable |
ARBAR[1:0] | ‘b00 | ‘b00 | ‘b00 | ‘b00 | Normal access, respecting barriers |
ARSNOOP[3:0] | ‘b0000 | ‘b0000 | ‘b0000 | ‘b0000 | ReadNoSnoop or ReadOnce |
ARCACHE[3:0] | ‘b0010 or ‘b0011 |
‘b1011 | ‘b1111 | ‘b0000 | — |
AWDOMAIN[1:0] | ‘b00 | ‘b01 | ‘b01 | ‘b01 | ‘b00 = Non-shareable ‘b01 = Inner shareable |
AWBAR[1:0] | ‘b00 | ‘b00 | ‘b00 | ‘b00 | Normal access, respecting barriers |
AWSNOOP[2:0] | ‘b000 | ‘b000 | ‘b000 | ‘b000 | WriteNoSnoop or WriteUnique |
AWCACHE[3:0] | ‘b0010 or ‘b0011 |
‘b0111 | ‘b1111 | ‘b0000 | — |
AxUSER[7:0] | ‘b11100000 | ‘b00000100 | ‘b00000100 | ‘b00000100 | 0xE0 = SDRAM direct 0x04 = CCU |
AxPROT[2:0] | ‘b0xx | ‘b0xx | ‘b0xx | ‘b0xx | AxPROT[2]= data/instruction AxPROT[1]= secure/nonsecure AxPROT[0]= unprivileged/privileged |
AxLEN[7:0] | — | — | — | — | The burst length for:
|
AxSIZE[2:0] | — | — | — | — | The number of bytes in a transfer must be equal to the data bus width. |
AxBURST[1:0] | ‘b01 or ‘b10 | ‘b01 or ‘b10 | ‘b01 or ‘b10 | ‘b01 or ‘b10 | Must be INCR(‘b01) or WRAP(‘b10) |
AxLOCK[1:0] | ‘b00 | ‘b00 | ‘b00 | ‘b00 | Must be normal access |
AxQOS | — | — | — | — | Do not care |