Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

9.3.2. CPU Core Power Gating

You can select which combination of CPU cores to use in your application by power gating unused cores. The CPU cores are power gated by cutting off power at the platform board level. There are no on-die power gates for the CPU cores. The unused core power rails are statically tied to the ground.

The two Cortex-A55 cores share a common power domain. The individual Cortex-A76 cores are in separate power domains and can be gated independently. Only core 0 and core 2 can be configured as boot core.