Hard Processor System Component Reference Manual: Agilex™ 5 SoCs

ID 813752
Date 8/09/2024
Public
Document Table of Contents

3.1.3. RTL Simulation Setup Scripts

Platform Designer generates scripts for several simulators that you can use to complete the simulation process, as listed in the following table.
Simulator Script Name Directory
1 Questa* Intel® FPGA Edition msim_setup.tcl <project directory>/<Platform Designer design name>/sim/mentor
2 Siemens* EDA QuestaSim*
3 Cadence® NCSim xcelium_setup.sh <project directory>/<Platform Designer design name>/sim/xcelium
4 Synopsys* VCS* vcs_setup.sh <project directory>/<Platform Designer design name>/sim/synopsys/vcs
5 Synopsys* VCS* MX vcsmx_setup.sh <project directory>/<Platform Designer design name>/sim/synopsys/vcsmx
6 Aldec® Riviera-PRO* NOT SUPPORTED NOT SUPPORTED
Note: The (1) Questa* Intel® FPGA Edition is licensed together with the Quartus® Prime Pro Edition software. You need to purchase a separate license to use the (2) Siemens* EDA QuestaSim* , (3) Cadence® NCSim, (4) Synopsys* VCS* , (5) Synopsys* VCS* MX simulators. For information about the purchase of licenses, please access the respective official websites.

The following sections show the detailed steps on creating the test scripts for the supported simulators.