Hard Processor System Component Reference Manual: Agilex™ 5 SoCs

ID 813752
Date 8/09/2024
Public
Document Table of Contents

5.5. HPS EMIF Platform Designer Example Designs

The following table describes each Example Design supported in Quartus version 24.1.0.115, how many EMIFs are used, which IO96 channel(s) is(are) used, and the path/filename to the example.
Table 23.   HPS EMIF Platform Designer Example Designs
Name EMIFs

IO96b0

ch0

IO96B0

ch1

IO96B1

ch0

IO96B1

ch1

Path
DDR4_1x16_1EMIF 1 1x16 --- --- --- ./A5ExB/DDR4_1x16_1EMIF
DDR4_1x16_ECC_1EMIF 1 1x16 --- --- --- ./A5ExB/DDR4_1x16_ECC_1EMIF
DDR4_1x32_1EMIF 1 1x32 --- --- --- ./A5ExB/DDR4_1x32_1EMIF
DDR4_1x32_ECC_1EMIF 1 1x32 --- --- --- ./A5ExB/DDR4_1x32_ECC_1EMIF
DDR4_2x32_2EMIF 2 1x32 --- 1x32 --- ./A5ExB/DDR4_2x32_2EMIF
DDR4_2x32_ECC_2EMIF 2 1x32 --- 1x32 --- ./A5ExB/DDR4_2x32_ECC_2EMIF
DDR5_1x16_1EMIF 1 1x16 --- --- --- Not Supported by Agilex 5 E-series (Group B)
DDR5_1x16_ECC_1EMIF 1 1x16 --- --- ---
DDR5_2x16_1EMIF 1 1x16 1x16 --- ---
DDR5_1x32_1EMIF 1 1x32 --- --- ---
DDR5_1x32_ECC_1EMIF 1 1x32 --- --- ---
DDR5_2x32_2EMIF 2 1x32 --- 1x32 ---
DDR5_2x32_ECC_2EMIF 2 1x32 --- 1x32 ---
LPDDR4_1x16_1EMIF 1 1x16 --- --- --- ./A5ExB/LPDDR4_1x16_1EMIF
LPDDR4_2x16_1EMIF 1 1x16 1x16 --- --- ./A5ExB/LPDDR4_2x16_1EMIF
LPDDR4_1x32_1EMIF 1 1x32 --- --- --- ./A5ExB/LPDDR4_1x32_1EMIF
LPDDR4_2x32_2EMIF 2 1x32 --- 1x32 --- ./A5ExB/LPDDR4_2x32_1EMIF
LPDDR4_4x16_2EMIF 2 1x16 1x16 1x16 1x16 ./A5ExB/LPDDR4_4x16_1EMIF
LPDDR5_1x16_1EMIF 1 1x16 --- --- --- Not Supported in Quartus version 24.1.0.115
LPDDR5_2x16_1EMIF 1 1x16 1x16 --- ---
LPDDR5_1x32_1EMIF 1 1x32 --- --- ---
LPDDR5_2x32_2EMIF 2 1x32 --- 1x32 ---
LPDDR5_4x16_2EMIF 2 1x16 1x16 1x16 1x16