Hard Processor System Component Reference Manual: Agilex™ 5 SoCs

ID 813752
Date 8/09/2024
Public
Document Table of Contents

3.6. HPS-to-FPGA AXI* Initiator Interface

The HPS-to-FPGA AXI* initiator interface, hps2fpga, is connected to a Mentor Graphics* AXI* initiator BFM for simulation with an instance name of h2f_axi4_manager_inst. In Platform Designer, you can configure the HPS-to-FPGA AXI* interface with the following address, data, and ID widths. The BFM clock input is connected to hps2fpga_axi_clock clock.

Table 20.  Configuration of HPS-to-FPGA AXI* Subordinate BFM
Parameter Value
AXI* Address Width 20-40
AXI* Read Data Width 32, 64 or 128
AXI* Write Data Width 32, 64 or 128
AXI* ID Width 4

You control and monitor the AXI* initiator BFM by using the BFM API.