Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide: Agilex™ 5 FPGAs and SoCs

ID 813665
Date 7/08/2024
Public
Document Table of Contents

2.5. Hardware Testing

Follow the procedure at the provided link to test the design example in the selected hardware.
In the Clock Controller application, which is part of the development kit, set the following frequencies:
  • Si5332 (U412), OUT0—156.25MHz