Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide: Agilex™ 5 FPGAs and SoCs

ID 813665
Date 7/08/2024
Public
Document Table of Contents

7.6. IEEE 1588v2 Timestamp Interface Signals

Table 28.  IEEE 1588v2 Timestamp Interface Signals
Signal Direction Width Description
tx_egress_timestamp_96b_valid Out [NUM_CHANNELS] When asserted, this signal qualifies the timestamp, tx_egress_timestamp_96b_data[], and the fingerprint, tx_egress_timestamp_96b_fingerprint[], of the TX frame.
tx_egress_timestamp_96b_data Out [NUM_CHANNELS][96] Carries the 96-bit egress timestamp in the following format:
  • Bits 48 to 95: 48-bit seconds field
  • Bits 16 to 47: 32-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field
tx_egress_timestamp_96b_fingerprint Out [NUM_CHANNELS][TSTAMP_FP_WIDTH]

Specifies the fingerprint of the TX frame that the 96-bit timestamp is for.

tx_egress_timestamp_64b_valid Out [NUM_CHANNELS] When asserted, this signal qualifies the timestamp, tx_egress_timestamp_64b_data[], and the fingerprint, tx_egress_timestamp_64b_fingerprint[], of the TX frame.
tx_egress_timestamp_64b_data Out [NUM_CHANNELS][64] Carries the 64-bit egress timestamp in the following format:
  • Bits 16 to 63: 48-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field
tx_egress_timestamp_64b_fingerprint Out [NUM_CHANNELS][TSTAMP_FP_WIDTH]

Specifies the fingerprint of the TX frame that the 64-bit timestamp is for.

rx_egress_timestamp_96b_valid Out [NUM_CHANNELS] When asserted, this signal qualifies the timestamp, rx_ingress_timestamp_96b_data[]. The MAC IP asserts this signal in the same clock cycle it asserts avalon_st_rx_startofpacket.
rx_egress_timestamp_96b_data Out [NUM_CHANNELS][96] Carries the 96-bit ingress timestamp in the following format:
  • Bits 48 to 95: 48-bit seconds field
  • Bits 16 to 47: 32-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field
rx_egress_timestamp_64b_valid Out [NUM_CHANNELS] When asserted, this signal qualifies the timestamp, rx_ingress_timestamp_64b_data[]. The MAC IP asserts this signal in the same clock cycle it asserts avalon_st_rx_startofpacket.
rx_egress_timestamp_64b_data Out [NUM_CHANNELS][64] Carries the 64-bit ingress timestamp in the following format:
  • Bits 16 to 63: 48-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field