L- and H-Tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 10/27/2023
Public

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Document Table of Contents

8.1.4.2. Intel Marker

Table 58.   Intel Marker - 0xB88

Bits

Register Description

Default Value

Access

[31:0]

Intel Marker - An additional marker for standard Intel programming software to be able to verify that this is the right structure.

0x41721172 RO