L- and H-Tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 10/27/2023
Public

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Document Table of Contents

9.1.1. Endpoint Testbench for SR-IOV

The Endpoint testbench for SR-IOV supports up to two PFs and 32 VFs per PF.
First, the testbench configures the link and accesses then Configuration Space. Then, the testbench performs the following tests:
  1. A single memory write followed by a single memory read to each PF and VF.
  2. For PF0 only, the testbench drives memory writes to each VF and followed by memory reads of all VFs.