Hard Processor System Component Reference Manual: Agilex™ 5 SoCs

ID 813752
Date 8/09/2024
Public
Document Table of Contents

5.1. Terminology

Table 21.  Terminology
Term Description
HPS Hard Processor System
EMIF External Memory Interface
MPFE Multi-Port Front End
DDR Double Data Rate memory
LPDDR Low Power Double Data Rate memory
IOBank Contains the specific/dedicated IO pins and Hard Memory Controller required for SDRAM connected to the MPFE