Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813663
Date 7/08/2024
Public
Document Table of Contents

3.6.2. Priority-Based Flow Control

Follow these steps to use the priority-based flow control (PFC):

  1. Turn on the Priority-based flow control (PFC) parameter and specify the number of priority levels using the Number of PFC priorities parameter. You can specify between 2 to 8 PFC priority levels.
  2. Set the following registers.
    • On the TX datapath:
      • Set tx_pauseframe_enable to 0 to disable the IEEE 802.3 flow control.
      • Set tx_pfc_priority_enable[n] to 1 to enable the PFC for priority queue n.
    • On the RX datapath:
      • Set the IGNORE_PAUSE bit in the rx_frame_control register to 1 to disable the IEEE 802.3 flow control.
      • Set the rx_pfc_control[7:0] register bits to 0 to enable the PFC. Most of the rest of the bits are unused.
  3. Connect the avalon_st_tx_pfc_gen_data signal to the corresponding RX client logic and the avalon_st_rx_pfc_pause_data signal to the corresponding TX client logic.
  4. You have the option to configure the MAC RX to forward the PFC frame to the client by setting the rx_pfc_control[16] register to 1. By default, the MAC RX drops the PFC frame after processing it.
You must handle the XON/XOFF requests in the following manner:
  1. Assert the XOFF, which runs at the clock frequency of 312.5 MHz, for at least 1 clock cycle, which runs at the clock frequency of 312.5 MHz to ensure that the PFC frame can transfer successfully.
  2. Assert the XON, which runs at the clock frequency of 312.5 MHz, for at least 25 clock cycle to ensure that the PFC frame can transfer successfully.