Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813663
Date 7/08/2024
Public
Document Table of Contents

3.6.1. IEEE 802.3 Flow Control

To use the IEEE 802.3 flow control, set the following registers:

  • On the TX datapath:
    • Set tx_pfc_priority_enable[7:0] to 0 to disable the PFC. The rest of the bits are unused.
    • Set tx_pauseframe_enable[0] to 1 to enable the IEEE 802.3 flow control.
  • On the RX datapath:
    • Set rx_pfc_control[7:0] to 1 to disable the PFC. The rest of the bits are mostly unused.
    • Set the IGNORE_PAUSE bit in the rx_frame_control register to 0 to enable the IEEE 802.3 flow control.