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5.1. Migrating Nios® II Processor to Nios® V Processor
5.2. Timer
5.3. Interrupt
5.4. Ethernet Stack
5.5. Bootloader
5.6. Data and Instruction Cache
5.7. Tightly Coupled Memory
5.8. Custom Instructions
5.9. Error Correction Code
5.10. Intel® HAL Settings
5.11. Micrium MicroC/OS-II BSP Settings
5.12. Software Packages
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5.7. Tightly Coupled Memory
Nios® II/f and Nios® V/g processors support tightly coupled memory (TCM).
TCM | Nios® V/g Processor | Nios® II/f Processor |
---|---|---|
Number of Instruction TCM (ITCM) | Two | Four |
Number of Data TCM (DTCM) | Two | Four |
Memory Type | Dual-port (Internal port to processor and external subordinate port). | Depends on the connected on-chip memory:
|
TCMs Size | 0 Bytes (Disabled), up to 512 MBytes | Depends on the connected on-chip memory. |
TCMs Location | Internal within Nios® V processor core (internal RAM). | External to Nios® II processor core (system RAM). |
TCMs Instantiation | Instantiated within the processor upon enable. |
|
Memory Initialization | Supports HEX or MIF file. | Supports HEX or MIF file. |
TCM | Nios® V/g Processor | Nios® II/f Processor |
---|---|---|
Memory Region |
|
|
Nios® V Processor Application Execute-In-Place from ITCM | Initialize dual-port ITCM and single-port DTCM (or system RAM) with Application HEX file. |
|
alt_load() with ITCM | Supported with dual-port ITCM and single-port DTCM. |
|
Download Nios® V Processor Application into ITCM | Supported with dual-port ITCM and single-port DTCM. |
|
External Host Interface |
|
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Figure 45. Tightly-Coupled Memory in Nios® V/g Processor
Figure 46. Tightly-Coupled Memory with Nios® II/f Processor