7.1. Arithmetic and Logic Operations
| Nios® II Processor | Nios® V Processor | ||
|---|---|---|---|
| Operation | Assembler Syntax | Operation | Assembler Syntax |
| rC ← rA + rB | add rC, rA, rB | xC ← xA + xB | add xC, xA, xB |
| rB ← rA + σ(IMM16) | addi rB, rA, IMM16 | xB ← xA + σ(IMM12) | addi xB, xA, IMM12 |
| rC ← rA & rB | and rC, rA, rB | xC ← xA & xB | and xC, xA, xB |
| rB ← rA & (IMM16 : 0x0000) | andhi rB, rA, IMM16 | xB ← xA & (IMM20 : 0x000) | lui xB, IMM20 and xB, xA, xB |
| rB ← rA & (0x0000 : IMM16) | andi rB, rA, IMM16 | xB ← xA & σ(IMM12) | andi xB, xA, IMM12 |
| rB ← rA & (0x0000 : IMM16) | andi rB, rA, IMM16 | xB ← xA & (0x0000 : IMM16) | li xB, IMM16 and xB, xA, xB |
| if (rA == rB) then rC ← 1 else rC ← 0 |
cmpeq rC, rA,rB | if (xA - xB == 0) then xC ← 1 else xC ← 0 |
sub xB, xA, xB seqz xC, xB |
| if (rA == σ(IMM16)) then rB ← 1 else rB ← 0 |
cmpeqi rB, rA,IMM16 | if (xA - ±IMM15 == 0) then xB ← 1 else xB ← 0 |
li xB, ±IMM15 sub xB, xA, xB seqz xB,xB |
| if ((signed) rA >= (signed) rB) then rC ← 1 else rC ← 0 |
cmpge rC, rA, rB | if ((signed) xA < (signed) xB) then xC ← 0 else xC ← 1 |
slt xC, xA, xB not xC, xC andi xC, xC, 1 |
| if ((signed) rA >= (signed) σ(IMM16)) then rB ← 1 else rB ← 0 |
cmpgei rB, rA, IMM16 | if ((signed) xA < (signed) σ(IMM12)) then xB ← 0 else xB ← 1 |
slti xB, xA, IMM12 not xB, xB andi xB, xB, 1 |
| if ((unsigned) rA >= (unsigned) rB) then rC ← 1 else rC ← 0 |
cmpgeu rC, rA, rB | if ((unsigned) xA < (unsigned) xB) then xC ← 0 else xC ← 1 |
sltu xC, xA, xB not xC, xC andi xC, xC, 1 |
| if ((unsigned) rA >= (unsigned) (0x0000 : IMM16)) then rB ← 1 else rB ← 0 |
cmpgeui rB, rA, IMM16 | if ((unsigned) xA < (unsigned) (0x00000 : IMM12)) then xB ← 0 else xB ← 1 |
sltiu xB, xA, IMM12 not xB, xB andi xB, xB, 1 |
| if ((signed) rA > (signed) rB) then rC ← 1 else rC ← 0 |
cmpgt rC, rA, rB | if ((signed) xA > (signed) xB) then xC ← 1 else xC ← 0 |
slt xC, xB. xA |
| if ((signed) rA > (signed) σ(IMM16)) then rB ← 1 else rB ← 0 |
cmpgti rB, rA, IMM16 | if ((signed) xA > (signed) IMM15) then xB ← 1 else xB ← 0 |
li xB, ±IMM15 slt xB, xB. xA |
| if ((unsigned) rA > (unsigned) rB) then rC ← 1 else rC ← 0 |
cmpgtu rC, rA, rB | if ((unsigned) xA > (unsigned) xB) then xC ← 1 else xC ← 0 |
sltu xC, xB, xA |
| if ((unsigned) rA > (unsigned) (0x0000 : IMM16)) then rB ← 1 else rB ← 0 |
cmpgtui rB, rA, IMM16 | if ((unsigned) xA > (unsigned) (0x0000 : IMM16)) then xB ← 1 else xB ← 0 |
li xB, IMM16 sltu xB, xB, xA |
| if ((signed) rA <= (signed) rB) then rC ← 1 else rC ← 0 |
cmple rC, rA, rB | if ((signed) xA > (signed) xB) then xC ← 0 else xC ← 1 |
slt xC, xB, xA not xC, xC andi xC, xC, 1 |
| if ((signed) rA <= (signed) σ(IMM16)) then rB ← 1 else rB ← 0 |
cmplei rB, rA, IMM16 | if ((signed) xA < (signed) σ(IMM12+1)) then xB ← 1 else xB ← 0 |
slti xB, xA, IMM12+1 |
| if ((unsigned) rA <= (unsigned) rB) then rC ← 1 else rC ← 0 |
cmpleu rC, rA, rB | if ((unsigned) xB < (unsigned) xA) then xC ← 0 else xC ← 1 |
sltu xC, xB, xA not xC, xC andi xC, xC, 1 |
| if ((unsigned) rA <= (unsigned) (0x0000 : IMM16)) then rB ← 1 else rB ← 0 |
cmpleui rB, rA, IMM16 | if ((unsigned) xA < (unsigned) (0x00000 : IMM12+1)) then xB ← 1 else xB ← 0
|
sltiu xB, xA, IMM12+1 |
| if ((signed) rA < (signed) rB) then rC ← 1 else rC ← 0 |
cmplt rC, rA, rB | if ((signed) xA < (signed) xB) then xC ← 1 else xC ← 0 |
slt xC, xA, xB |
| if ((signed) rA < (signed) σ(IMM16)) then rB ← 1 else rB ← 0 |
cmplti rB, rA, IMM16 | if ((signed) xA < (signed) σ(IMM12)) then xC ← 1 else xC ← 0 |
slti xC, xA, IMM12 |
| if ((unsigned) rA < (unsigned) rB) then rC ← 1 else rC ← 0 |
cmpltu rC, rA, rB | if ((unsigned) xA < (unsigned) xB) then xC ← 1 else xC ← 0 |
sltu xC, xA, xB |
| if ((unsigned) rA < (unsigned) (0x0000 : IMM16)) then rB ← 1 else rB ← 0 |
cmpltui rB, rA, IMM16 | if ((unsigned) xA < (unsigned) (0x00000 : IMM12)) then xC ← 1 else xC ← 0 |
sltiu xC, xA, IMM12 |
| if (rA != rB) then rC ← 1 else rC ← 0 |
cmpne rC, rA, rB | If (xA – xB != 0) then xC ← 1 else xC ← 0 |
sub xC, xA, xB snez xC, xC |
| if (rA != σ(IMM16)) then rB ← 1 else rB ← 0 |
cmpnei rB, rA, IMM16 | If (xA – (signed)IMM15 != 0) then xC ← 1 else xC ← 0 |
li xB, ±IMM15 sub xC, xA, xB snez xC, xC |
| rC ← (signed) rA ÷ (signed) rB | div rC, rA, rB | xC ← (signed) xA ÷ (signed) xB | div xC, xA, xB |
| rC ← (unsigned) rA ÷ (unsigned) rB | divu rC, rA, rB | xC ← (unsigned) xA ÷ (unsigned) xB | divu xC, xA, xB |
| rC ← (rA x rB)31..0 | mul rC, rA, rB | xC ← (xA x xB) 31..0 | mul xC, xA, xB |
| rB ← (rA x σ(IMM16))31..0 | muli rB, rA, IMM16 | xB ←σ(IMM12) xC ← (xA x xB) 31..0 |
addi xB, x0, IMM12 mul xB, xA, xB |
| rC ← ((signed) rA) x ((signed) rB))63..32 | mulxss rC, rA, rB | xC ← ((signed) xA) x ((signed) xB)) 63..32 | mulh xC, xA, xB |
| rC ← ((signed) rA) x ((unsigned) rB))63..32 | mulxsu rC, rA, rB | xC ← ((signed) xA) x ((unsigned) xB)) 63..32 | mulhsu xC, xA, xB |
| rC ← ((unsigned) rA) x ((unsigned) rB))63..32 | mulxuu rC, rA, rB | xC ← ((unsigned) xA) x ((unsigned) xB)) 63..32 | mulhu xC, xA, xB |
| rC ← ~(rA | rB) | nor rC, rA, rB | xC ← xA | xB xC ← ~xC |
or xC, xA, xB not xC, xC |
| rC ← rA | rB | or rC, rA, rB | xC ← xA | xB | or xC, xA, xB |
| rB ← rA | (IMM16 : 0x0000) | orhi rB, rA, IMM16 | xB ← xA | (IMM20 : 0x000) | lui xC, IMM20 or xB, xA, xC |
| rB ← rA | (0x0000 : IMM16) | ori rB, rA, IMM16 | xB ← xA | σ(IMM12) | ori xB, xA, IMM12 |
| rB ← rA | (0x0000 : IMM16) | ori rB, rA, IMM16 | xC ← (0x0000 : IMM16) xB ← xA | xC |
li xC, IMM16 or xB, xA, xC |
| rC ← rA rotated left rB4..0 bit positions | rol rC, rA, rB | Not available in Nios® V processor | - |
| rC ← rA rotated left IMM5 bit positions | roli rC, rA, IMM5 | Not available in Nios® V processor | - |
| rC ← rA rotated right rB4..0 bit positions | ror rC, rA, rB | Not available in Nios® V processor | - |
| rC ← rA << (rB4..0) | sll rC, rA, rB | xC ← xA << (xB4..0) | sll xC, xA, xB |
| rC ← rA << IMM5 | slli rC, rA, IMM5 | xC ← xA << IMM5 | slli xC, xA, IMM5 |
| rC ← (signed) rA >> ((unsigned) rB4..0) | sra rC, rA, rB | xC ← (signed) xA >> ((unsigned) xB4..0) | sra xC, xA, xB |
| rC ← (signed) rA >> ((unsigned) IMM5) | srai rC, rA, IMM5 | xC ← (signed) xA >> ((unsigned) IMM5) | srai xC, xA, IMM5 |
| rC ← (unsigned) rA >> ((unsigned) rB4..0) | srl rC, rA, rB | xC ← (unsigned) xA >> ((unsigned) xB4..0) | srl xC, xA, xB |
| rC ← (unsigned) rA >> ((unsigned) IMM5) | srli rC, rA, IMM5 | xC ← (unsigned) xA >> ((unsigned) IMM5) | srli xC, xA, IMM5 |
| rC ← rA – rB | sub rC, rA, rB | xC ← xA - xB | sub xC, xA, xB |
| rB ← rA –σ(IMMED) | subi rB, rA, IMMED | xC ← xA - σ(IMM12) | addi xC, xA, -IMM12 |
| rC ← rA ^ rB | xor rC, rA, rB | xC ← xA ^ xB | xor xC, xA, xB |
| rB ← rA ^ (IMM16 : 0x0000) | xorhi rB, rA, IMM16 | xB ← xA ^ (IMM20 : 0x000) | lui xC, IMM20 xor xB, xA, xC |
| rB ← rA ^ (0x0000 : IMM16) | xori rB, rA, IMM16 | xB ← xA ^ σ(IMM12) | xori xC, xA, IMM12 |
| rB ← rA ^ (0x0000 : IMM16) | xori rB, rA, IMM16 | xC ← IMM16 xB ← xA ^ xC |
li xC, IMM16 xor xB, xA, xC |