Intel Agilex® 7 F-Series FPGA (Two F-Tiles) Development Kit User Guide

ID 739942
Date 8/07/2023
Public
Document Table of Contents

A.4.1. Push Buttons

The Intel Agilex® 7 FPGA (two F-tiles) development board includes several dedicated push buttons for you. When you press and hold down the button, the device pin is set to logic 0. When you release the button, the device pin is set to logic 1. There are no board-specific functions for these general user push buttons.

Table 26.  Push Buttons
Board Reference Schematic Signal Name I/O Standard
S1 CPU_RESETn 3.3V
S2 HPS_RESETn 3.3V
S3 PCIE_PERSTn 1.8V
S4 GFX_2ND_PERSTn 1.8V
S6 CXL_PERSTn 3.3V