Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide

Download PDF
ID 739942
Date 12/20/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. Document Revision History for the Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide A. Development Kit Components B. Developer Resources C. Safety and Regulatory Compliance Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Before You Begin 2.2. Handling the Board 2.3. Quartus® Prime Software and Driver Installation
2.3. Quartus® Prime Software and Driver Installation x
2.3.1. Installing the Quartus® Prime Pro Edition Software 2.3.2. Installing the Development Kit 2.3.3. Installing the Intel® FPGA Download Cable II Driver
3. Development Kit Setup x
3.1. Default Settings 3.2. Powering Up the Development Board
4. Board Test System x
4.1. Set Up BTS GUI Running Environment 4.2. Test the Functionality of the Development Kit 4.3. Control On-Board Clock through Clock Controller GUI 4.4. Monitor On-Board Power Regulator through Power Monitor GUI 4.5. BTS Test Areas 4.6. Identify Test Pass or Fail based on BTS GUI Test Status
4.1. Set Up BTS GUI Running Environment x
4.1.1. Downloading OpenJDK 4.1.2. Downloading OpenJFX 4.1.3. Installing OpenJDK and OpenJFX 4.1.4. Setting Up the Quartus® Prime Software for BTS Operation 4.1.5. Running the BTS GUI
4.2. Test the Functionality of the Development Kit x
4.2.1. The Bottom Info Bar 4.2.2. The Configure Menu 4.2.3. The Sys Info Tab 4.2.4. The GPIO Tab 4.2.5. The XCVR Tab 4.2.6. The Memory Tab
4.2.5. The XCVR Tab x
4.2.5.1. The QSFP NRZ Tab 4.2.5.2. The QSFP PAM4 Tab 4.2.5.3. The QSFPDD NRZ Tab 4.2.5.4. The QSFPDD PAM4 Tab
5. Development Kit Hardware and Configuration x
5.1. JTAG Configuration Mode 5.2. Active Serial (AS) x4 Configuration Mode 5.3. Avalon® Streaming Interface x16 Configuration Mode
6. Custom Projects for the Development Kit x
6.1. Add SmartVID Settings in the Quartus® Prime QSF File 6.2. Golden Top
A. Development Kit Components x
A.1. Board Overview and Components A.2. FPGA Configuration A.3. Default Switch and Jumper Settings A.4. Input and Output Components A.5. Components and Interfaces A.6. I2C A.7. MAX® 10 SPI Bus A.8. Clock Circuits A.9. HPS Daughter Card A.10. System Power A.11. Power Guidelines A.12. Power Distribution System A.13. Power Measurement A.14. Thermal Limitations and Protection
A.1. Board Overview and Components x
A.1.1. Board Overview A.1.2. Board Components A.1.3. MAX® 10 CPLD System Controller
A.2. FPGA Configuration x
A.2.1. Programming the FPGA over On-Board Intel® FPGA Download Cable II A.2.2. Programming the FPGA over an External Intel® FPGA Download Cable II
A.3. Default Switch and Jumper Settings x
A.3.1. Switch Description A.3.2. Jumper Description
A.4. Input and Output Components x
A.4.1. Push Buttons A.4.2. Switches A.4.3. LEDs
A.5. Components and Interfaces x
A.5.1. PCI Express* ( PCIe* ) Interface A.5.2. QSFP-DD Interface A.5.3. QSFP Interface A.5.4. CXL Interface A.5.5. DDR4 DIMM1 Interface A.5.6. DDR4 DIMM2 Interface A.5.7. DDR4 Component Interface A.5.8. HPS IO48 Interface
A.11. Power Guidelines x
A.11.1. In a Standard PCIe* -Compliant System A.11.2. As a Standalone Evaluation Board Powered by Included Power Supply
C. Safety and Regulatory Compliance Information x
C.1. Safety and Regulatory Information C.2. Compliance Information
C.1. Safety and Regulatory Information x
C.1.1. Safety Warnings C.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide
A. Development Kit Components
B. Developer Resources
C. Safety and Regulatory Compliance Information

7. Document Revision History for the Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide

Document Version Changes
2024.12.20
  • Retitled document from Intel Agilex® 7 F-Series FPGA (Two F-Tiles) Development Kit User Guide to Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide.
  • Updated the Overview chapter:
    • Updated the chapter description.
    • Updated Table: Ordering Information.
    • Updated and retitled Figure: Agilex™ 7 F-Series FPGA (Two F-Tiles) Development Kit Block Diagram to Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit Block Diagram (DK-DEV-AGF027F1ES).
    • Added new figures:
      • Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit—Top View
      • Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit Block Diagram (DK-DEV-AGF023FA)
    • Updated Feature Summary to include information for the AGFD023 devices.
    • Updated Recommended Operating Conditions.
  • Updated the Getting Started chapter:
    • Added new topics:
      • Before You Begin
      • Handling the Board
      • Installing the Quartus Prime Pro Edition Software
      • Installing the Development Kit
      • Installing the Intel FPGA Download Cable II Driver
    • Updated Quartus® Prime Software and Driver Installation.
    • Removed Design Examples.
  • Updated and retitled chapter Power Up the Development Kit to Development Kit Setup.
    • Retitled topic Applying Power to the Development Board to Powering Up the Development Board.
    • Updated the function descriptions of SW3[1:4] and SW4[1:4] in Table: Factory Default Switch Settings.
  • Updated the Board Test System chapter:
    • Updated and retitled the following topics:
      • Downloading OpenJDK
      • Downloading OpenJFX
      • Installing OpenJDK and OpenJFX
    • Retitled topic Install the Quartus® Prime Software to Setting Up the Quartus® Prime Software for BTS Operation.
    • Updated all the figures in the Test the Functionality of the Development Kit section.
  • Updated the Development Kit Hardware and Configuration chapter:
    • Retitled topic Avalon® -ST x16 Configuration Mode to Avalon® Streaming Interface-ST x16 Configuration Mode.
    • Updated the image 1 and image 2 download selection for J106 and J105 in Table: Image Download Selection.
  • Updated the Development Kit Components appendix chapter:
    • Updated the U8 description in Table: Featured Devices under the Board Components topic.
    • Added the J5 description in Table: Memory Devices under the Board Components topic and the DDR4 DIMM2 Interface topic to state that the DIMM2 (J5) is not available in the Agilex™ 7 AGFD023R24C2E1VC development kit.
    • Updated the functions of SW4 switch position 2, 3, and 4 in Table: SW4 under the Switch Description topic.
    • Updated PCI Express* ( PCIe* ) Interface topic.
  • Restructured the document to improve clarity and for ease of reference.
  • Updated for the latest branding standards.
2023.08.07 Updated the Block Diagram figure to conform to Intel standards.
2023.06.26
  • Updated product family name to " Intel Agilex® 7."
  • Updated development kit name to " Intel Agilex® 7 FPGA F-Series Development Kit."
  • Retitled the document from Intel® Agilex™ F-Series FPGA (Two F-Tiles) Development Kit User Guide to Intel Agilex® 7 F-Series FPGA (Two F-Tiles) Development Kit User Guide.
2022.09.21 Initial release.
Level Two Title