Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide

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ID 739942
Date 12/20/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. Document Revision History for the Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide A. Development Kit Components B. Developer Resources C. Safety and Regulatory Compliance Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Before You Begin 2.2. Handling the Board 2.3. Quartus® Prime Software and Driver Installation
2.3. Quartus® Prime Software and Driver Installation x
2.3.1. Installing the Quartus® Prime Pro Edition Software 2.3.2. Installing the Development Kit 2.3.3. Installing the Intel® FPGA Download Cable II Driver
3. Development Kit Setup x
3.1. Default Settings 3.2. Powering Up the Development Board
4. Board Test System x
4.1. Set Up BTS GUI Running Environment 4.2. Test the Functionality of the Development Kit 4.3. Control On-Board Clock through Clock Controller GUI 4.4. Monitor On-Board Power Regulator through Power Monitor GUI 4.5. BTS Test Areas 4.6. Identify Test Pass or Fail based on BTS GUI Test Status
4.1. Set Up BTS GUI Running Environment x
4.1.1. Downloading OpenJDK 4.1.2. Downloading OpenJFX 4.1.3. Installing OpenJDK and OpenJFX 4.1.4. Setting Up the Quartus® Prime Software for BTS Operation 4.1.5. Running the BTS GUI
4.2. Test the Functionality of the Development Kit x
4.2.1. The Bottom Info Bar 4.2.2. The Configure Menu 4.2.3. The Sys Info Tab 4.2.4. The GPIO Tab 4.2.5. The XCVR Tab 4.2.6. The Memory Tab
4.2.5. The XCVR Tab x
4.2.5.1. The QSFP NRZ Tab 4.2.5.2. The QSFP PAM4 Tab 4.2.5.3. The QSFPDD NRZ Tab 4.2.5.4. The QSFPDD PAM4 Tab
5. Development Kit Hardware and Configuration x
5.1. JTAG Configuration Mode 5.2. Active Serial (AS) x4 Configuration Mode 5.3. Avalon® Streaming Interface x16 Configuration Mode
6. Custom Projects for the Development Kit x
6.1. Add SmartVID Settings in the Quartus® Prime QSF File 6.2. Golden Top
A. Development Kit Components x
A.1. Board Overview and Components A.2. FPGA Configuration A.3. Default Switch and Jumper Settings A.4. Input and Output Components A.5. Components and Interfaces A.6. I2C A.7. MAX® 10 SPI Bus A.8. Clock Circuits A.9. HPS Daughter Card A.10. System Power A.11. Power Guidelines A.12. Power Distribution System A.13. Power Measurement A.14. Thermal Limitations and Protection
A.1. Board Overview and Components x
A.1.1. Board Overview A.1.2. Board Components A.1.3. MAX® 10 CPLD System Controller
A.2. FPGA Configuration x
A.2.1. Programming the FPGA over On-Board Intel® FPGA Download Cable II A.2.2. Programming the FPGA over an External Intel® FPGA Download Cable II
A.3. Default Switch and Jumper Settings x
A.3.1. Switch Description A.3.2. Jumper Description
A.4. Input and Output Components x
A.4.1. Push Buttons A.4.2. Switches A.4.3. LEDs
A.5. Components and Interfaces x
A.5.1. PCI Express* ( PCIe* ) Interface A.5.2. QSFP-DD Interface A.5.3. QSFP Interface A.5.4. CXL Interface A.5.5. DDR4 DIMM1 Interface A.5.6. DDR4 DIMM2 Interface A.5.7. DDR4 Component Interface A.5.8. HPS IO48 Interface
A.11. Power Guidelines x
A.11.1. In a Standard PCIe* -Compliant System A.11.2. As a Standalone Evaluation Board Powered by Included Power Supply
C. Safety and Regulatory Compliance Information x
C.1. Safety and Regulatory Information C.2. Compliance Information
C.1. Safety and Regulatory Information x
C.1.1. Safety Warnings C.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Agilex™ 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide
A. Development Kit Components
B. Developer Resources
C. Safety and Regulatory Compliance Information

1.2. Feature Summary

  • Agilex™ 7 F-Series (DK-DEV-AGF027F1ES or DK-DEV-AGF023FA) device in 2340A BGA package
    • Quad-core 64-bit Arm* Cortex* -A53 hard processor (HPS)
    • 0.8 V VID-adjustable VCC core
    • Dual F-Tile transceivers supporting 56 Gbps (PAM4) and 32 Gbps (NRZ) data rates
    • 2.69M (DK-DEV-AGF027F1ES) or 2.30M (DK-DEV-AGF023FA) logic elements (LE)
    • 3.65M (DK-DEV-AGF027F1ES) or 3.12M (DK-DEV-AGF023FA) adaptive logic modules (ALM)
    • 8.5K (DK-DEV-AGF027F1ES) or 1.6K (DK-DEV-AGF023FA) digital signal processing (DSP) blocks
  • FPGA configuration
    • Avalon® streaming interface x16 and Active Serial (AS) x4 configuration modes support
    • 2 Gb flash for AS x4
    • Dual 2 Gb flash for Avalon® streaming interface x16
    • JTAG header for device programming
    • Built-in Intel® FPGA Download Cable II for device programming
  • Programmable clock sources
  • Transceiver interfaces
    • PCI Express* ( PCIe* ) x16 interface supporting Gen 4 end-point connected to a PCIe* x16 edge connector (gold edge fingers)
    • 1x QSFP optical module interface connected to F-Tile transceiver
    • 1x QSFPDD optical module interface connected to F-Tile transceiver
    • 1x PCIe* /CXL interface supporting x4 interface connected to MCIO connector
  • Memory interfaces
    • DK-DEV-AGF027F1ES: Two x72 DIMM sockets supporting DDR4-2666 or DDR-T Intel® Optane™ persistent memory module
    • DK-DEV-AGF023FA: One x72 DIMM socket supporting DDR4-2666 or DDR-T Intel® Optane™ persistent memory module
    • Single x40 DDR4 component interface for HPS processor memory
  • Communication ports
    • JTAG header
    • Micro USB on-board Intel® FPGA Download Cable II
    • System I2C header
  • Buttons, switches, and LEDs
    • CPU reset push button
    • PCIe* reset push button
    • CXL reset push button
    • HPS reset push button
    • Four dedicated user LEDs
    • Board power good LED
    • FPGA configuration done LED
  • Heatsink and fan
    • Air-cooled heatsink assembly
    • Red over-temperature warning LED
  • Power
    • PCIe* input power including required 2x4 auxiliary power connector
    • Blue power-good status LED
    • On/off slide power switch for benchtop operation
    • On-board power and temperature measurement circuitry
  • Mechanical
    • PCIe* standard height form-factor (full height, ¾ length, dual-width)
    • 4.375" x 10.0" board size
    • Two slots height with heatsink/fan assembly
  • Operating environment
    • Maximum ambient temperature of 0–35°C
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