A.1.2. Board Components
Board Reference | Type | Description |
---|---|---|
U8 | FPGA | Intel Agilex® 7 FPGA, AGFB027R24C2E2V
|
U5 | CPLD | Intel® MAX® 10 CPLD, 10M50DAF256I7G |
Board Reference | Type | Description |
---|---|---|
J10 | On-board Intel® FPGA Download Cable II | Micro-USB 2.0 connector for programming and debugging the FPGA. |
SW1 | PCIe* control DIP switch | Enables PCIe* link widths x1, x4, x8, and x16. |
SW2 | Intel® FPGA Download Cable II selection switch | Selects between the on-board Intel® FPGA Download Cable II or external Intel® FPGA Download Cable II connected to J3 header. |
SW3 Position 1-2 |
JTAG bypass DIP switch | Enables and disables devices in the JTAG chain. |
SW3 Position 3-4 | MSEL configuration DIP switch | Sets the Intel Agilex® 7 MSEL configuration modes |
SW4 | PCIe* clock control DIP switch | Provides control for PCIe* clock controls such as Spread Spectrum enable/disable, local or external PCIe* clock source, and PCIe* REFCLK power down. |
SW5 | Power-on slide switch | Main switch for powering on the Board when used in bench-top mode. This switch is ignored when the board is used in a PCIe* system. |
SW6 | Intel® MAX® 10 JTAGEN switch | Enables Intel® MAX® 10 to use the JTAG pins as I/Os. |
S1 | CPU RESETn | Sends an active low signal to the FPGA and Intel® MAX® 10 which can be used as the RESET for internal designs. |
S2 | HPS RESETn | Sends an active low signal to the Intel® MAX® 10. Intel® MAX® 10 can then send HPS_DC_RSTn to the HPS IO48 daughter card is present. |
S3 | 1st_ PCIe* _PERSTN push-button | Sends an active low signal to the dedicated PCIe* _PERSTN pin of transceiver Bank 13A. |
S4 | 2nd_ PCIe* _PERSTN push-button | Sends an active low signal to a GPIO pin in Bank 3A. This pin can be used as a secondary PERSTN signal. |
S6 | CXL_ PCIe* _PERSTN push-button | Sends an active low signal to the CXL connector PERSTN pin. |
J105 | Configuration image selection | Use together with J106 to select image stored in U4 for Avalon® -ST x16. |
J106 | Configuration image selection | Use together with J105 to select image stored in U4 for Avalon® -ST x16. |
Board Reference | Type | Description |
---|---|---|
D1 | Green Intel® MAX® 10 CONF_DONE LED | LED is on when the Intel® MAX® 10 is successfully configured. |
D2 | Blue power good LED | LED is on when Intel® MAX® 10 detects that all power on the board is good. |
D5 | Red over temperature LED | LED is on when the Intel® MAX® 10 detects an over-temperature condition on the board. |
D12 | Green FPGA CONF_DONE LED | LED is on when the FPGA is successfully configured. |
D[11:D8] | 4 green user LEDs | FPGA connected LEDs for user designs. |
D[25:24] | 2 green configuration image LEDs | Indicates which FPGA configuration image is loaded. |
Board Reference | Type | Description |
---|---|---|
U23 | ZL30733 IEEE 1588 clock device I2C programmable by Intel® MAX® 10 | Default frequencies:
|
U25, U26, U27 | PCIe* reference clocks
|
Default frequencies:
|
Board Reference | Type | Description |
---|---|---|
J1 | PCIe* x16 gold fingers | PCIe* TX/RX x16 interface from FPGA Bank 13A. |
J7, B1 | QSFPDD-56 pluggable optics interface | 8 TX/RX channels from FPGA Bank 12C, Quad2 and Quad3. |
J8, B2 | QSFP-56 pluggable optics interface | 4 TX/RX channels from FPGA Bank 12C, Quad1. |
J9 | PCIe* x4 over CXL connector | PCIe* TX/RX x4 interface from FPGA Bank 12C, Quad0. |
Board Reference | Type | Description |
---|---|---|
J4 | DDR4 DIMM1 connector | DDR4 x72 DIMM module installed by default. |
J5 | DDR4 DIMM2 connector | No DDR4 DIMM module installed by default. |
U15–U19 | DDR4 components | DDR4 x40 interface for HPS. |
U3, U4 | 2 x 2 Gbit QSPI flash | FPGA Avalon® -ST x16 configuration flash memory. |
U9 | 2 Gbit QSPI flash | FPGA AS x4 configuration flash memory. |
U45 | 64 Mbit serial nor flash | Intel® MAX® 10 Nios® II flash. |
U44 | 128 Kbit I2C EEPROM | MAC address EEPROM. |
U46 | 128 Kbit I2C EEPROM | Security certificate EEPROM. |
Board Reference | Type | Description |
---|---|---|
J3 | 10-pin JTAG header | For connecting an external Intel® FPGA Download Cable II dongle. |
J10 | Micro-USB connector | For connecting to the on-board Intel® FPGA Download Cable II. |
Board Reference | Type | Description |
---|---|---|
J2 | FAN header | 4-pin FAN header |
J13 | LTC3888 (U61) programming header | Programming header for LTC3888 VCC Core, VCC_HSSI voltage regulator |
J107 | LTC7132 (U93, U96) programming header | Programming header for U93 (LTC7132 VCCERT_FGT_GXF, VCCR_CORE) and U96 (LTC7132 VCC_PT, VCCIO_1V2) |
Board Reference | Type | Description |
---|---|---|
J11 | 12V_AUX power connector | 8-pin 12V_AUX input power connector |
U50 | MAX16545B device | Input power conditioner for 12V_ PCIe* |
U54 | MAX16545B device | Input power conditioner for 12V_AUX |
U94 | Analog devices LTM4625 | 5V DC-DC voltage regulator |
U56 | Intersil ISL80101 | 2.5V LDO voltage regulator |
U57 | Intersil ISL80101 | 1.8V LDO voltage regulator |
U58 | Intersil ISL80101 | 1.2V LDO voltage regulator |
U95 | Analog devices LTM4620A | 3.3V DC-DC voltage regulator |
U60, Q18 | Analog devices LTC1981, pass FET | 3.3V_SYS voltage |
U61, U62–U65 | Analog devices LTC3888 multiphase controller and FET power stage | 0.8V VCC core VID voltage regulator |
U61, U66 | Analog devices LTC3888 multiphase controller and FET power stage | 0.8V VCC_HSSI_GXF voltage regulator |
U80 | Intersil ISL80101 | 0.9V VCCH_SDM LDO voltage regulator |
U93 | Analog devices LTC7132 dual-output regulator | 1.0V VCCERT_FGT_GXF voltage regulator |
1.2V VCCR_CORE voltage regulator | ||
U96 | Analog devices LTC7132 dual-output regulator | 1.8V VCCPT voltage regulator |
1.2V VCCIO_1V2 voltage regulator | ||
U70 | Intersil ISL80101 | 1.0V VCCFUSEWR_GXF LDO voltage regulator |
D28 | LT1389 VREF generation | 1.25V VREF for VCCBAT |
U74 | Intersil ISL80101 | 1.8V VCCIO_SDM_HPS LDO voltage regulator |
U75 | Intersil ISL80101 | 2.5V DDR4 DIMM LDO voltage regulator |
U76 | Intersil ISL80101 | 2.5V DDR4 COMP LDO voltage regulator |
U77 | Texas Instruments TPS51200 | 0.6V DDR4 DIMM VTT/VREF generation |
U78 | Texas Instruments TPS51200 | 0.6V DDR4 COMP VTT/VREF generation |