Intel® Stratix® 10 DX FPGA Development Kit User Guide

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ID 683561
Date 9/25/2023
Public
Document Table of Contents
Document Table of Contents x
1. Getting Started 2. Development Kit Overview 3. Power Up the Development Kit 4. Board Test System (BTS) 5. Development Kit Hardware and Configuration 6. Document Revision History for Intel® Stratix® 10 DX FPGA Development Kit User Guide A. Development Kit Components B. Safety and Regulatory Information C. Compliance and Conformity Information
1. Getting Started x
1.1. About this Document 1.2. Installing the Intel® Quartus® Prime Pro Edition Software 1.3. Downloading the Board Package 1.4. Installing the Driver for Intel FPGA Download Cable II
1.2. Installing the Intel® Quartus® Prime Pro Edition Software x
1.2.1. Activating Your License
2. Development Kit Overview x
2.1. Supported Features 2.2. Recommended Operating Conditions 2.3. Handling the Board
3. Power Up the Development Kit x
3.1. Default Switch Settings 3.2. Connectors and LEDs 3.3. Performing Board Restore through Board Test System (BTS) 3.4. Controlling On-board Clock
4. Board Test System (BTS) x
4.1. Preparing the Development Kit 4.2. Running the Board Test System 4.3. Using the Board Test System 4.4. Smart VID Setting
4.3. Using the Board Test System x
4.3.1. Configure Menu 4.3.2. Sys Info Tab 4.3.3. GPIO Tab 4.3.4. QSFP Tab 4.3.5. Component DDR4 CH0 Tab 4.3.6. Component DDR4 CH1 Tab 4.3.7. DDR4 DIMM CH0 Tab 4.3.8. DDR4 DIMM CH1 Tab 4.3.9. Power Monitor 4.3.10. Clock Controller
5. Development Kit Hardware and Configuration x
5.1. FPGA Configuration 5.2. Programming the FPGA Over Intel® FPGA Download Cable 5.3. Configuration Modes
5.3. Configuration Modes x
5.3.1. Avalon® Streaming Interface x8 Mode 5.3.2. JTAG Mode
5.3.1. Avalon® Streaming Interface x8 Mode x
Avalon® Streaming Interface x8 Configuration Guideline
A. Development Kit Components x
A.1. Components Overview A.2. Power, Thermal, and Mechanical Considerations A.3. Clock Circuits A.4. Memory Interface A.5. PCIe Interface A.6. UPI Interface A.7. Transceiver Signals: PCIe and UPI Interface A.8. SlimSAS Connector A.9. QSFP Network Interface A.10. I2C Interface A.11. QSPI Flash Memory
A.2. Power, Thermal, and Mechanical Considerations x
A.2.1. Power Guidelines A.2.2. Thermal Requirements A.2.3. Mechanical Requirements
A.2.1. Power Guidelines x
A.2.1.1. Power Distribution A.2.1.2. Power Sequence A.2.1.3. Power Measurement
A.2.2. Thermal Requirements x
A.2.2.1. Operating Conditions A.2.2.2. Temperature Monitoring
A.9. QSFP Network Interface x
A.9.1. Dual Port Controller
A.11. QSPI Flash Memory x
A.11.1. Configuration QSPI Flash Memory A.11.2. NIOS QSPI Flash Memory
B. Safety and Regulatory Information x
B.1. Safety Warnings B.2. Safety Cautions
1. Getting Started
2. Development Kit Overview
3. Power Up the Development Kit
4. Board Test System (BTS)
5. Development Kit Hardware and Configuration
6. Document Revision History for Intel® Stratix® 10 DX FPGA Development Kit User Guide
A. Development Kit Components
B. Safety and Regulatory Information
C. Compliance and Conformity Information

3. Power Up the Development Kit

The Intel® Stratix® 10 DX FPGA development kit is designed to operate in two modes:
  • As a PCIe* add-in card
  • Bench-top mode
When operating the card as a PCIe* system, insert the card into an available PCIe* slot and connect a 2x4 pin PCIe* power cable from the system to power connectors at J42 of the board.
Note: When operating as a PCIe* add-in card, the board does not power on unless power is supplied to J42.

In Bench-top mode, you must supply the board with 240 W of power supply connected to the power connector J42.

This development kit ships with its switches preconfigured to support the design examples in the kit. If you suspect that your board may not be correctly configured with the default settings, refer to the Default Switch and Jumper Settings section of this chapter.

Follow these instructions:
  1. Connect the supplied power supply to an outlet and the DC Power Jack (J42) on the FPGA board.
    Note: Use only the supplied power supply. Power regulation circuits on the board can be damaged by power supplies with greater voltage.
  2. Set the power switch (SW31) to the ON position.
When the board powers up, the blue LED illuminates and the board is ready for use. The Orange LED (D56) should also illuminate indicating that all the power rails on the board are good. If the POWER GOOD LED (D56) is not illuminated, it indicates that the power supply is malfunctioned and the board will not power up.
Note: The standby powers are always present as soon as the AUX power is applied to J42. Use power switch SW31 to start the board.

Section Content
Default Switch Settings
Connectors and LEDs
Performing Board Restore through Board Test System (BTS)
Controlling On-board Clock

Level Two Title