Visible to Intel only — GUID: GUID-6EB14C07-8AC1-4DB0-B5FC-4A4EFC8535B8
Visible to Intel only — GUID: GUID-6EB14C07-8AC1-4DB0-B5FC-4A4EFC8535B8
Viewing Simulation Waveforms
By default, the Intel oneAPI DPC++/C++ Compiler instructs the simulator not to log any signal because logging signals slows the simulation, and the waveform files can be enormous. However, you can configure the compiler to save these waveforms for debugging purposes.
To enable signal logging in the simulator, invoke the icpx command with the -Xsghdl option, as follows:
icpx -fsycl -fintelfpga -Xssimulation -Xsghdl[=<depth>] <input files> -o <project_name>
Specify the <depth> attribute to indicate the number of hierarchy levels logged. A depth value of 1 logs only the top-level signals. A depth of 1 is used as the default if you do not specify the <depth> attribute. To log all waveforms, specify a depth of 0 (-Xsghdl=0).
After running the simulation, you can view the generated waveform files by invoking the appropriate script as follows:
Linux
bash <project_directory>/view_waveforms.sh
Windows
<project_directory>\view_waveforms.cmd