Developer Guide

Intel oneAPI FPGA Handbook

ID 785441
Date 2/07/2024
Public

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Debugging and Verifying Your Design

To debug and verify the functional correctness of your design, you have the following options:

  • Emulate your design through the Intel® FPGA Emulation Platform for OpenCL™ software and use a debugger like GDB or the Windows* Visual C++ debugger.

    For details, refer to Emulate and Debug Your Design.

  • Simulate your kernel in simulation software like Questa*-Intel® FPGA Edition. Simulation lets you evaluate how your kernel performs on the FPGA device without having to compile your design to hardware.

    During simulation, you can also capture signal waveforms to further debug your kernel.

    For details, refer to Evaluate Your Kernel Through Simulation.

Depending on whether you are targeting the FPGA emulator, simulator, or hardware, you must use the correct SYCL* device selector in the host code. You can also use the FPGA hardware device selector for simulation. To see how you can use a selector to specify the target device at compile time, refer to Device Selectors for FPGA.