Visible to Intel only — GUID: GUID-F16B44A4-60A5-41F9-B75D-32D669865924
Visible to Intel only — GUID: GUID-F16B44A4-60A5-41F9-B75D-32D669865924
FPGA Memory Attributes
The following table summarizes memory attributes:
Attribute |
Description |
Example |
---|---|---|
bank_bits | Specifies that the local memory addresses should use bits for bank selection. |
|
bankwidth | Specifies that the memory implementing the variable or array must have memory banks of a defined width. |
|
doublepump | Specifies that the memory implementing the variable, or an array must be clocked at twice the rate as the kernel accessing it. |
|
force_pow2_depth | Specifies that the memory implementing the variable or array has a power-of-2 depth. |
|
max_replicates | Specifies that the memory implementing the variable, or an array has no more than the specified number of replicates to enable simultaneous accesses from the datapath. |
|
fpga_memory | Forces a variable or an array to be implemented as an embedded memory. |
|
merge | Allows merging of two or more variables or arrays defined in the same scope with respect to width or depth. |
|
numbanks | Specifies that the memory implementing the variable or array must have a defined number of memory banks. |
|
private_copies | Specifies that the memory implementing the variable, or an array has no more than the specified number of independent copies to enable concurrent thread or loop iteration accesses. |
|
fpga_register | Forces a variable or an array to be carried through the pipeline in registers. |
|
simple_dual_port | Specifies that the memory implementing the variable or array should have no port that serves both reads and writes. |
|
singlepump | Specifies that the memory implementing the variable or array must be clocked at the same rate as the kernel accessing it. |
|