Pin Connection Guidelines: Agilex™ 5 FPGAs and SoCs

ID 813266
Date 11/21/2024
Public
Document Table of Contents

1.2.11. No Connect and DNU Pins

Note: Altera recommends that you create a Quartus® Prime design, enter your device I/O assignments, and compile the design. The Quartus® Prime software checks your pin connections according to I/O assignment and placement rules. The rules differ from one device to another based on device density, package, I/O assignments, voltage assignments, and other factors that are not fully described in this document or the device user guides.
Table 12.  No Connect and DNU Pins
Pin Name Pin Functions Pin Description Connection Guidelines
DNU Do Not Use Do Not Use (DNU).

Do not connect to power, GND, or any other signal. These pins must be left floating.

NC No Connect Do not drive signals into these pins.

When designing for device migration, you have the option to connect these pins to either power, GND, or a signal trace depending on the pin assignment of the devices selected for migration.

However, if device migration is not a concern, leave these pins floating.