Questa* Intel® FPGA Edition Simulation User Guide

ID 730191
Date 4/01/2024
Public
Document Table of Contents

2.3. Simulation Tool Flow

The simulation tool flow begins with the compilation stage that compiles files into logical libraries using simulator specific compilation commands.

The next stage is elaboration, where you run the elaboration command to generate an executable simulation model. In the final stage, you run the executable simulation model to run the simulation.

The following topics describe these simulation tool flow concepts in more detail:

  1. Specifying Logical Libraries
  2. Compiling Files into Library Directories
  3. Understanding Elaboration
  4. Commands to Configure and Run Simulation