Questa* Intel® FPGA Edition Simulation User Guide

ID 730191
Date 4/01/2024
Public
Document Table of Contents

2.8.1. Setting Up the Run Simulation Feature

You must first setup the Run Simulation feature before using it to automate portions of the simulation flow.

To setup the Run Simulation feature by specifying the settings that identify your simulator, output path, and other options, follow these steps:

  1. Open a project in the Quartus® Prime software.
  2. Click Tools > Options > EDA Tool Options and specify the location of your simulator executable file, as Execution Paths for Supported EDA Simulators describes in detail.
    Figure 7. Specifying Simulator Install Path


  3. To enable automated generation of the IP simulation models whenever you generate HDL for IP in Platform Designer, click Tools > Options > Board and IP Settings > IP Simulation. Make sure Generate IP simulation model when generating IP option is turned on, as Simulation Options describes in detail.
    Figure 8. Specifying Automated IP Simulation Model Generation


  4. Click Assignments > Settings > EDA Tool Settings > Simulation and specify the following simulation settings:
    1. For Testbench Specification, click the New button and enter the testbench information, including the Top level module in testbench, Simulation period, and Testbench and simulation files options.
      Figure 9. Defining Testbench Specification


    2. Click the Simulation Flow Settings button to specify additional options for the automated simulation flow, as Simulation Flow Settings describes in detail.
      Figure 10. Simulation Flow Settings